The advancement of semiconductor manufacturing technology makes it practical to place a traditional board-level embedded system on a single chip. The evolvement of system-on-chip (SoC) techniques presents new challenges on integrated circuit (IC) designs as well as embedded software and systems. A SoC system usually has limited hardware resource or functionality such as battery capacity, slower processors, and small memory, which induce the complexity of embedded software design. Traditional system software cannot simply be directly deployed on a SoC system to fully utilize its capabilities without considerable modifications in design and implementation. Software development tools, such as compilers, linkers, loaders, assemblers, debuggers, and simulators, have therefore become an integral part of the SoC system design. The requirement and design methodology of these tools are quite different from those on the generalpurpose computing systems. In addition, conventional approaches to developing software usually cannot proceed until the hardware is ready and fully tested. In contrast, hardware/software co-design becomes a crucial step in the development of SoC embedded software. It significantly speeds up the design and implementation process of hardware and software of an embedded system. In this chapter, we first discuss low-power scheduling of embedded software, which is a core issue in an embedded system design. It includes an in-depth and broad introduction on low-power task scheduling and device scheduling. We later investigate the development framework for device drivers and hardware/software co-design methodology. Finally, we look into the topics in compiler and software development toolchains.
|Title of host publication||Essential Issues in SOC Design|
|Subtitle of host publication||Designing Complex Systems-on-Chip|
|Number of pages||57|
|ISBN (Print)||1402053517, 9781402053511|
|State||Published - 1 Dec 2006|