Embedded I/O PAD circuit design for OTP memory power-switch functionality

Shao Chang Huang*, Ke-Horng Chen, Wei Yao Lin, Zon Lon Lee, Kun Wei Chang, Erica Hsu, Wenson Lee, Lin Fwu Chen, Chris Lu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

2 Scopus citations

Abstract

An additional high-voltage pad is generally applied for one-time-programming (OTP) memory product applications. This may increase the complexity of input/output (I/O) pad arrangement and the area penalty. In this paper, a novel approach of I/O circuit embedded with the power-switch function is proposed for multifunction integrations in one I/O pad. The capabilities of high-voltage programming, I/O signal handling, electrostatic discharge protection and latch-up prevention for this novel circuit are well examined from silicon verifications.

Original languageEnglish
Article number5712201
Pages (from-to)746-750
Number of pages5
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume20
Issue number4
DOIs
StatePublished - 1 Apr 2012

Keywords

  • Electrostatic discharge (ESD)
  • Neobit
  • one-time programming (OTP)

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