Embedded I/O PAD circuit design for OTP memory power-switch functionality

Shao Chang Huang; Ke-Horng Chen; Wei Yao Lin; Zon Lon Lee; Kun Wei Chang; Erica Hsu; Wenson Lee; Lin Fwu Chen; Chris Lu

doi:10.1109/TVLSI.2011.2106808

Embedded I/O PAD circuit design for OTP memory power-switch functionality

Shao Chang Huang^*, Ke-Horng Chen, Wei Yao Lin, Zon Lon Lee, Kun Wei Chang, Erica Hsu, Wenson Lee, Lin Fwu Chen, Chris Lu

^*Corresponding author for this work

Department of Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

An additional high-voltage pad is generally applied for one-time-programming (OTP) memory product applications. This may increase the complexity of input/output (I/O) pad arrangement and the area penalty. In this paper, a novel approach of I/O circuit embedded with the power-switch function is proposed for multifunction integrations in one I/O pad. The capabilities of high-voltage programming, I/O signal handling, electrostatic discharge protection and latch-up prevention for this novel circuit are well examined from silicon verifications.

Original language	English
Article number	5712201
Pages (from-to)	746-750
Number of pages	5
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	20
Issue number	4
DOIs	https://doi.org/10.1109/TVLSI.2011.2106808
State	Published - 1 Apr 2012

Keywords

Electrostatic discharge (ESD)
Neobit
one-time programming (OTP)

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10.1109/TVLSI.2011.2106808

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@article{14ae3b72eabd4d4b81b77c98cc619b2a,

title = "Embedded I/O PAD circuit design for OTP memory power-switch functionality",

abstract = "An additional high-voltage pad is generally applied for one-time-programming (OTP) memory product applications. This may increase the complexity of input/output (I/O) pad arrangement and the area penalty. In this paper, a novel approach of I/O circuit embedded with the power-switch function is proposed for multifunction integrations in one I/O pad. The capabilities of high-voltage programming, I/O signal handling, electrostatic discharge protection and latch-up prevention for this novel circuit are well examined from silicon verifications.",

keywords = "Electrostatic discharge (ESD), Neobit, one-time programming (OTP)",

author = "Huang, {Shao Chang} and Ke-Horng Chen and Lin, {Wei Yao} and Lee, {Zon Lon} and Chang, {Kun Wei} and Erica Hsu and Wenson Lee and Chen, {Lin Fwu} and Chris Lu",

year = "2012",

month = apr,

day = "1",

doi = "10.1109/TVLSI.2011.2106808",

language = "English",

volume = "20",

pages = "746--750",

journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",

issn = "1063-8210",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "4",

}

Embedded I/O PAD circuit design for OTP memory power-switch functionality. / Huang, Shao Chang; Chen, Ke-Horng; Lin, Wei Yao; Lee, Zon Lon; Chang, Kun Wei; Hsu, Erica; Lee, Wenson; Chen, Lin Fwu; Lu, Chris.

In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 20, No. 4, 5712201, 01.04.2012, p. 746-750.

Research output: Contribution to journal › Article › peer-review

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T1 - Embedded I/O PAD circuit design for OTP memory power-switch functionality

AU - Huang, Shao Chang

AU - Chen, Ke-Horng

AU - Lin, Wei Yao

AU - Lee, Zon Lon

AU - Chang, Kun Wei

AU - Hsu, Erica

AU - Lee, Wenson

AU - Chen, Lin Fwu

AU - Lu, Chris

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Y1 - 2012/4/1

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KW - Electrostatic discharge (ESD)

KW - Neobit

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