Electrostatic Integrity in Negative-Capacitance FETs - A Subthreshold Modeling Approach

Pin Su*, Wei Xiang You

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

Using an analytical subthreshold potential model, this paper shows that the negative-capacitance FinFET (NC-FinFET) inherently possesses a superior electrostatic integrity than the baseline FinFET. Taking into account the spacer induced distributed charges in our subthreshold model, we demonstrate that an adequate spacer design can be utilized to further enhance the NC effect and the electrostatic integrity for NC-FinFETs. This may serve as a way to extend the FinFET scaling.

Original languageEnglish
Title of host publication2019 IEEE International Electron Devices Meeting, IEDM 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Electronic)9781728140315
DOIs
StatePublished - Dec 2019
Event65th Annual IEEE International Electron Devices Meeting, IEDM 2019 - San Francisco, United States
Duration: 7 Dec 201911 Dec 2019

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
Volume2019-December
ISSN (Print)0163-1918

Conference

Conference65th Annual IEEE International Electron Devices Meeting, IEDM 2019
CountryUnited States
CitySan Francisco
Period7/12/1911/12/19

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