Electrical properties of sputter deposited SrTiO 3 gate dielectrics

Chih Yi Liu, Tseung-Yuen Tseng*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

11 Scopus citations

Abstract

We report the electrical properties of gate dielectric SrTiO 3 (STO) thin films on Si substrates grown by radio-frequency magnetron sputtering. The interfacial layer between STO and Si degrades the performance of the gate dielectric. We used SiON as a sacrificial layer for incorporating nitrogen into Si substrate surface, which can retard the formation of interfacial layer during the high temperature growth of STO gate dielectric. The polycrystalline STO film grown on nitrogen incorporated Si substrate exhibited lower leakage current due to better interfacial properties and higher dielectric constant. The repeated spike heating technique was also employed to deposit polycrystalline STO film for improving the thermal uniformity of the wafer, which leads to lower gate leakage current. The processing parameters including working pressure, oxygen mass ratio and plasma power also show obvious effect on the electrical properties of the films.

Original languageEnglish
Pages (from-to)1449-1453
Number of pages5
JournalJournal of the European Ceramic Society
Volume24
Issue number6
DOIs
StatePublished - 1 Jan 2004

Keywords

  • Electrical properties
  • Films
  • Gate dielectric
  • SrTiO

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