Electrical characteristics of nanoscale multi-fin field effect transistors with different fin aspect ratio

Hui Wen Cheng*, Chih Hong Hwang, Yiming Li

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Device characteristics of multiple-fin silicon field effect transistors (FETs) arc sensitive to the channel fin aspect ratio (AR = the fin height/the fin width). In this study, dependence of characteristics on AR for single- and multi-fin FETs are examined by using a three-dimensional device simulation. The threshold voltage (Vth) variation of triple-fin FET is smaller than that of single-fin one due to a relatively larger effective device width. The triple-fin device with FinFET structure (AR = 2) exhibit rather stable V th roll-off characteristics owing to more uniform potential distribution inside the channel. The results of our study show that the driving current, transconductance, gate capacitance of FinFETs are superior to that of tri-gate (AR = 1) and quasi-planar (AR = 0.5) FETs. From the layout viewpoint, FinFETs has the best layout area efficiency; consequently, to design a device with the subthreshold swing < 70 mV/dec, the layout area of FinFETs is 1.67 and 1.33 times smaller than those of quasi-planar and tri-gate FETs.

Original languageEnglish
Title of host publicationNanotechnology 2009
Subtitle of host publicationFabrication, Particles, Characterization, MEMS, Electronics and Photonics - Technical Proceedings of the 2009 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2009
Pages609-612
Number of pages4
StatePublished - 2009
EventNanotechnology 2009: Fabrication, Particles, Characterization, MEMS, Electronics and Photonics - 2009 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2009 - Houston, TX, United States
Duration: 3 May 20097 May 2009

Publication series

NameNanotechnology 2009: Fabrication, Particles, Characterization, MEMS, Electronics and Photonics - Technical Proceedings of the 2009 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2009
Volume1

Conference

ConferenceNanotechnology 2009: Fabrication, Particles, Characterization, MEMS, Electronics and Photonics - 2009 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2009
CountryUnited States
CityHouston, TX
Period3/05/097/05/09

Keywords

  • 3D device simulation
  • Aspect ratio
  • Channel fin
  • Characteristic sensitivity
  • FinFETs
  • Quasi-planar FETs
  • Tri-gate FETs

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