Efficient gate oxide defect screen for VLSI reliability

Joseph C. King*, Wilson Y. Chan, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalConference article

10 Scopus citations

Abstract

We report the feasibility and effectiveness of short voltage stress for oxide defect screen in this paper. Wafer-level in-process voltage stress rather than post-process burn-in may be necessary for defect screening, so that all the thin oxides can be accessed and higher voltage may be used to accelerate the burn-in. Oxide breakdown theory has been successfully used to model this defect control method.

Original languageEnglish
Pages (from-to)597-600
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
DOIs
StatePublished - 1 Dec 1994
EventProceedings of the 1994 IEEE International Electron Devices Meeting - San Francisco, CA, USA
Duration: 11 Dec 199414 Dec 1994

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