highspeed digital filters are important for Realtime digital signal processing applications. In this paper, we present some new bit-level systolic architectures based on a new inner product computation scheme for finite impulse response (FIR) and infinite impulse response (IIR) digital filterings. The FIR filter structure is optimized in the sense that, for a given clock rate, both the utilization efficiency and average throughput are maximized. The IIR filter structure has approximately the same utilization efficiency and throughput rate as previous related techniques for processing a single data stream (channel), but it allows two data streams to be processed concurrently to double the performance. This feature makes the new IIR system attractive for use in applications where multiple filtering and particularly bandpass analysis are required.