The important role on the electrical performance of nano-scaled oxide interface in wafer bonding has been neglected in some work. In this study, the electrical characteristics and microstructures of in- and anti-phase bonded interfaces in both n and p-type (100) GaAs wafers treated at 450, 500, and 600°C have been investigated in detail. It was found that n-GaAs did not bond directly to itself, but via an amorphous oxide layer at 450, and 500°C respectively. The non-linear behavior of current versus voltage can be understood in terms of the potential barrier formed at the interface. Both experiments and theoretical calculations are presented. When treated temperature was equal to 600°C, the morphology of nano-scaled oxide bonded interface varied dramatically in the sample being bonded in-phase for the n-type. Similar behavior occurred for the p-type but at much lower temperature. It was also found that electrical performance is closely related to the variation of nano-sized interface microstructure. Both the phase of bonding and type of wafer affect the distribution of oxide in the interface at different treated temperatures and therefore the associated electrical performance.
|Number of pages||6|
|State||Published - 1 Dec 2005|
|Event||207th ECS Meeting - Quebec, Canada|
Duration: 16 May 2005 → 20 May 2005
|Conference||207th ECS Meeting|
|Period||16/05/05 → 20/05/05|