The integrity of thin gate oxide structures fabricated by implanting BF2 + ions into bilayered CoSi/amorphous silicon films and subsequent annealing has been studied as a function of cobalt suicide thickness and implantation energy. Significant degradation of gate oxide integrity and flatband voltage shifts were found with increasing cobalt silicide thickness and annealing temperature. It is shown that although thinner cobalt silicide can result in excellent gate dielectric integrity it also leads to worse thermal stability at a high annealing temperature. Moreover, shallower implantation depth and lower annealing temperature can reduce the boron penetration, but depletion effects in polycrystalline silicon gates are caused accordingly. Hence, appropriate process conditions, involving trade-offs among CoSi2 thickness, implantation energy and annealing temperature, must be used to optimize the device performance while retaining the thin dielectric reliability.