Effects of base oxide thickness and silicon composition on charge trapping in HfSiO/SiO2 high-k gate stacks

W. U. Wei-Hao*, Mao Chieh Chen, Bing-Yue Tsui, Yong Tian Hou, Liang Gi Yao, Yin Jin, Hun Jan Tao, Shih Chang Chen, Mong Song Liang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

This work investigates the fundamentals of charge trapping and the effects of base oxide thickness and Si composition on charge trapping in HfSiO/SiO 2 high-k gate stacks using positive-bias temperature (PBT) stressing scheme. During the PBT stress, threshold voltage shift and saturation drain current degradation induced by charge trapping continue to grow and eventually become saturated, whereas the subthreshold swing and maximum transconductance remain unchanged. The extent of charge trapping increases with the decrease of base oxide thickness and Si composition in the HfSiO film, which can be explained by considering the channel-to-bulk tunneling time constant and the amount of neutral Hf-OH trapping centers in the HfSiO bulk layer. The power law dependence of saturation drain current degradation on the gate bias voltage indicates that charge trapping would become more significant if thin base oxide and low Si composition were employed in the further scaled HfSiO/SiO2 high-k gate stacks.

Original languageEnglish
Pages (from-to)5977-5981
Number of pages5
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume44
Issue number8
DOIs
StatePublished - 5 Aug 2005

Keywords

  • Base oxide
  • Charge trapping
  • Hafnium silicate
  • High-k gate dielectric
  • Si composition

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