Effective on-chip inductance modeling for multiple signal lines and application on repeater insertion

Yu Cao, Xuejue Huang, Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Chen-Ming Hu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

A new approach to handle the inductance effect on multiple signal lines is presented. The worst case switching pattern is first identified. Then a numerical approach is used to model the effective loop inductance (Leff) for multiple lines. Based on look-up table for Leff, an equivalent single line model can be generated to decouple a specific signal line from the others to perform static timing analysis. Compared to the use of full RLC netlist for multiple lines, this approach greatly improves the computation efficiency and maintains accuracy for timing and signal integrity analysis. Applications to repeater insertion in the critical path chains are demonstrated. For a single line, the RLC model minimizes delay with fewer number of repeaters than RC model. However, for multiple lines, we find that same number of repeaters is inserted for optimal delay according to both the RC and RLC multiple line models.

Original languageEnglish
Title of host publicationProceedings of the IEEE 2001 2nd International Symposium on Quality Electronic Design, ISQED 2001
PublisherIEEE Computer Society
Pages185-190
Number of pages6
ISBN (Electronic)0769510256
DOIs
StatePublished - 1 Jan 2001
Event2nd IEEE International Symposium on Quality Electronic Design, ISQED 2001 - San Jose, United States
Duration: 26 Mar 200128 Mar 2001

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2001-January
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Conference

Conference2nd IEEE International Symposium on Quality Electronic Design, ISQED 2001
CountryUnited States
CitySan Jose
Period26/03/0128/03/01

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