Effective electrostatic discharge protection circuit design using novel full-silicided N-MOSFETs in sub-100 nm era

Jam Wem Lee, Yi-Ming Li*, Howard Tang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper, the floating charge effect is considered in the design of new full-silicided NMOSFETs for designing electrostatic discharge (ESD) protection nanocircuit. The new full-silicided ESD protection devices are designed, fabricated, and studied; our investigation demonstrates significantly the improvement of sustaining ESD robustness than that of the conventional full-silicided device. Furthermore, it has an excellent electrical efficiency than those of drain ballast resistor tied devices. Moreover, our novel design avoid the unexpected floating charge effects during the normally operation conditions.

Original languageEnglish
Title of host publication2004 4th IEEE Conference on Nanotechnology
Pages605-607
Number of pages3
DOIs
StatePublished - 16 Aug 2004
Event2004 4th IEEE Conference on Nanotechnology - Munich, Germany
Duration: 16 Aug 200419 Aug 2004

Publication series

Name2004 4th IEEE Conference on Nanotechnology

Conference

Conference2004 4th IEEE Conference on Nanotechnology
CountryGermany
CityMunich
Period16/08/0419/08/04

Keywords

  • Circuit design
  • ESD
  • Fabrication
  • Floating charge effect
  • Full-silicided
  • Measurement
  • Nanodevice
  • Semiconductor devices
  • Silicide-blocked
  • Simulation
  • ULSI

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