Effect of surface treatment of Si substrates and annealing condition on high-k rare earth oxide gate dielectrics

C. Ohshima*, J. Taguchi, I. Kashiwagi, H. Yamamoto, S. Ohmi, H. Iwai

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

15 Scopus citations

Abstract

Effect of chemical oxide and low temperature long time annealing on the electrical characteristics for rare earth oxides deposited on Si(100) were investigated. Formation of chemical oxide on Si substrates prior to the Gd 2 O 3 depositions was found to decrease the leakage current significantly compared the films deposited on HF-last Si substrate, when the thickness was 3.5nm or thicker, while the effect was not observed when the thickness was 2.8nm. Annealing at 400°C for 90min also decreased leakage current of Dy 2 O 3 thin films with little increase of capacitance equivalent thickness (CET).

Original languageEnglish
Pages (from-to)302-306
Number of pages5
JournalApplied Surface Science
Volume216
Issue number1-4 SPEC.
DOIs
StatePublished - 30 Jun 2003

Keywords

  • Chemical oxide
  • High-k gate dielectric
  • Interfacial layer
  • Low temperature long time annealing
  • MBE
  • Rare earth oxides

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