Effect of substrate contact on ESD failure of advanced CMOS integrated circuits

Y. Wei*, Y. Loh, C. Wang, Chen-Ming Hu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Isolating substrate contact from the I/O power bus can reduce the noise in an advanced CMOS device. However, ESD immunity is found to be weakened. Failure analysis reveals that between the two current paths when a negative pulse is applied to I/O and Vss, the weaker current path dominates because of this circuit technique.

Original languageEnglish
Title of host publicationElectrical Overstress/Electrostatic Discharge Symposium Proceedings
Editors Anon
PublisherPubl by Reliability Analysis Cent
Pages221-224
Number of pages4
ISBN (Print)1878303392
StatePublished - 1 Dec 1993
EventProceedings of the Electrical Overstress/Electrostatic Discharge Symposium - Orlando, FL, USA
Duration: 28 Sep 199330 Sep 1993

Publication series

NameElectrical Overstress/Electrostatic Discharge Symposium Proceedings
ISSN (Print)0739-5159

Conference

ConferenceProceedings of the Electrical Overstress/Electrostatic Discharge Symposium
CityOrlando, FL, USA
Period28/09/9330/09/93

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