Effect of lanthanum silicate interface layer on the electrical characteristics of 4H-SiC metal-oxide-semiconductor capacitors

Y. M. Lei, H. Wakabayashi, K. Tsutsui, H. Iwai, M. Furuhashi, S. Tomohisa, S. Yamakawa, K. Kakushima*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

The effect of La-silicate interface layer (IL) on the electrical characteristics of 4H-SiC metal-oxide-semiconductor (MOS) capacitors with atomic-layer-deposited SiO2 (ALD-SiO2) gate dielectrics was investigated. In addition to a slight reduction in the interface state density (Dit), the surface potential fluctuation was greatly reduced due to the reduction in the fixed charges (Qfix) with La-silicate IL. Moreover, two orders of magnitude reduction in the oxide trap density in the ALD-SiO2 layer adjacent to the La-silicate IL was confirmed. Physical analysis revealed the reduction in carbon concentration and incorporation of La atoms adjacent to the La-silicate IL.

Original languageEnglish
Pages (from-to)248-252
Number of pages5
JournalMicroelectronics Reliability
Volume84
DOIs
StatePublished - May 2018

Keywords

  • Gate dielectrics
  • Interface
  • La-silicate
  • MOS
  • SiC

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