ECCSyn. A synthesis tool for ECC circuits

Chau-Chin Su*, Jyrghong Wang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

ECCSyn is an automated tool dedicated for the synthesis of ECC circuits. ECCSyn takes H matrices as inputs and produces physical layouts automatically. A greedy and an exhaustive search algorithms are implemented for ECC logic minimization. They achieve 37.7% and 40.8% reduction in gate counts respectively.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherPubl by IEEE
Pages1706-1709
Number of pages4
ISBN (Print)0780312813
DOIs
StatePublished - 1 Jan 1993
EventProceedings of the 1993 IEEE International Symposium on Circuits and Systems - Chicago, IL, USA
Duration: 3 May 19936 May 1993

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume3
ISSN (Print)0271-4310

Conference

ConferenceProceedings of the 1993 IEEE International Symposium on Circuits and Systems
CityChicago, IL, USA
Period3/05/936/05/93

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