Early-late gate receiving for Bluetooth packet

C. S. Peng*, M. H. Chang, Kuei-Ann Wen

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

3 Scopus citations

Abstract

An efficient early-late gate scheme for Bluetooth packet receiving had been proposed. It eliminates the use of Analogto-Digital Converter (ADC) and expends only hundred gate counts to implement the timing recovery. Simulation with complete Bluetooth V1.0 baseband and radio specifications had been established to confirm the timing recovery algorithm. Field programmable gate arrays (FPGA) emulation and ASIC implementation had all been completed for performance analysis.

Original languageEnglish
Pages57-60
Number of pages4
StatePublished - 1 Jan 2001
Event2001 International Symposium on VLSI Technology, Systems, and Applications, Proceedings - Hsinchu, Taiwan
Duration: 18 Apr 200120 Apr 2001

Conference

Conference2001 International Symposium on VLSI Technology, Systems, and Applications, Proceedings
CountryTaiwan
CityHsinchu
Period18/04/0120/04/01

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