@inproceedings{e5f3fcb43dbf407c9df959250e03a21f,
title = "Dual-phase pipeline circuit design automation with a built-in performance adjusting mechanism",
abstract = "The high speed dual phase operation domino circuit, which includes high-performance and reliable characteristics is proposed, and the circuit design technique with practical implementation is presented. The cell-based automatic synthesis flow supports the quick design of high performance chips. The test chip of a dual-phase 64 bit high-speed multiplier with a built-in performance adjustment mechanism is successfully validated using TSMC 0.18 technology. The test chip shows x2.7 performance improvement compared to the conventional static CMOS logic design.",
keywords = "Domino circuit, Pipeline",
author = "Tsai, {Yu Tzu} and Tsai, {Cheng Chih} and Chien, {Cheng An} and Cheng, {Ching Hwa} and Jiun-In Guo",
year = "2011",
month = mar,
day = "28",
doi = "10.1109/ASPDAC.2011.5722309",
language = "English",
isbn = "9781424475155",
series = "Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC",
pages = "85--86",
booktitle = "2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011",
note = "null ; Conference date: 25-01-2011 Through 28-01-2011",
}