Dual-Mode All-Digital Baseband Receiver with a Feed-Forward and Shared-Memory Architecture for Dual-Standard over 60 GHz NLOS Channel

Chun Yi Liu, Meng Siou Sie, Edmund Wen Jen Leong, Yu Cheng Yao, Chih Wei Jen, Wei Chang Liu, Chih Feng Wu, Shyh Jye Jou

Research output: Contribution to journalArticlepeer-review

11 Scopus citations

Abstract

In this paper, an 8X-parallelism all-digital baseband receiver is proposed to support SC and OFDM modes for both IEEE 802.15.3c and IEEE 802.11ad standards. The all-digital baseband receiver contains a 4-in-1 synchronization (SYNC), a 512-point radix-23 IFFT/FFT, a phase noise cancellation (PNC), a shared memory (MEM) bank and a frequency-domain equalizer (FDE) with an optimized golay-correlator window-based noise cancellation (OGC-WNC) channel estimation (CE) for non-line-of-sight (NLOS) and line-of-sight (LOS) channels. The hardware sharing is 99% between SC and OFDM modes and the shared memory reduces memory usage by 51%. The measurement results show that the fabricated chip can provide PHY data rate of 9.24 Gb/s with power consumption of 497 mW to meet the requirement of OFDM mode for IEEE 802.15.3c and 802.11ad standards. Besides, the PHY data rate of the fabricated chip reaches 14 Gb/s with power consumption of 698 mW for OFDM mode that is beyond the standard requirement to offer higher PHY data rate over 60 GHz transmission environment.

Original languageEnglish
Article number7795161
Pages (from-to)608-618
Number of pages11
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume64
Issue number3
DOIs
StatePublished - 1 Mar 2017

Keywords

  • 60 GHz
  • Digital baseband receiver
  • IEEE 802.11ad
  • IEEE 802.15.3c
  • orthogonal frequency division multiplexing (OFDM)
  • single carrier (SC)

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