Dual metal gates with band-edge work functions on novel HfLaO high- κ gate dielectric

X. P. Wang, C. Shen, Ming Fu Li, H. Y. Yu, Yiyang Sun, Y. P. Feng, Andy Lim, Hwang Wan Sik, Albert Chin, Y. C. Yeo, Patrick Lo, D. L. Kwong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

25 Scopus citations

Abstract

In this work, by using a novel HfLaO high-κ (HK) gate dielectric, we show for the first time that with a thermal budget of 1000°C, Fermi-Pinning in the HK-metal gate (MG) stack can be released. The effective metal work function (EWF) can be tuned by a wide range more than the requirement of bulk CMOSFETs, and also fits the future UTB-SOI CMOSFETs when Si body thickness is approaching 3 nm or less. As prototype examples, TaN gate with EWF ∼3.9-4.4 eV and TaN/Pt gate with EWF ∼5.5 eV are shown. In addition, by replacing HfO2 with HfLaO, high κ value and low gate tunneling are maintained, BTI Vth instability is improved by one order. These new findings are correlated to the enhanced thermal stability and significantly reduced oxygen vacancy density in HfLaO compared to HfO2 as estimated by the first-principles calculations.

Original languageEnglish
Title of host publication2006 Symposium on VLSI Technology, VLSIT - Digest of Technical Papers
Pages9-10
Number of pages2
DOIs
StatePublished - 1 Dec 2006
Event2006 Symposium on VLSI Technology, VLSIT - Honolulu, HI, United States
Duration: 13 Jun 200615 Jun 2006

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)0743-1562

Conference

Conference2006 Symposium on VLSI Technology, VLSIT
CountryUnited States
CityHonolulu, HI
Period13/06/0615/06/06

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    Wang, X. P., Shen, C., Li, M. F., Yu, H. Y., Sun, Y., Feng, Y. P., Lim, A., Sik, H. W., Chin, A., Yeo, Y. C., Lo, P., & Kwong, D. L. (2006). Dual metal gates with band-edge work functions on novel HfLaO high- κ gate dielectric. In 2006 Symposium on VLSI Technology, VLSIT - Digest of Technical Papers (pp. 9-10). [1705191] (Digest of Technical Papers - Symposium on VLSI Technology). https://doi.org/10.1109/VLSIT.2006.1705191