Dual-metal gate technology for deep-submicron CMOS transistors

Qiang Lu, Yee Chia Yeo, Pushkar Ranade, Hideki Takeuchi, Tsu Jae King, Chen-Ming Hu, S. C. Song, H. F. Luan, Dim Lee Kwong

Research output: Contribution to journalArticlepeer-review

53 Scopus citations

Abstract

Dual-metal gate CMOS devices with rapid-thermal chemical-vapor deposited (RTCVD) Si3N4 gate dielectric were fabricated using a self-aligned process. The gate electrodes are Ti and Mo for the N- and P-MOSFET respectively. Carrier mobilities are comparable to that predicted by the universal mobility model for SiO2. C-V characteristics show good agreement with a simulation that takes quantum-mechanical effects into account, and clearly display the advantage of metal over poly-Si gates.

Original languageEnglish
Pages (from-to)72-73
Number of pages2
JournalDigest of Technical Papers-Symposium on VLSI Technology
DOIs
StatePublished - 1 Jan 2000

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