Drive and control circuitry of OCB filed-sequential color LCD with high data rate

Ya Ting Hsu; Fang Cheng Lin; Chun Ho Chen; Yi-Pai Huang; Han Ping D. Shieh

Drive and control circuitry of OCB filed-sequential color LCD with high data rate

Ya Ting Hsu^*, Fang Cheng Lin, Chun Ho Chen, Yi-Pai Huang, Han Ping D. Shieh

^*Corresponding author for this work

Department of Photonics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Scopus citations

Abstract

This paper provides a data controlling method for optically compensated bend (OCB) field sequential color (FSC) liquid crystal displays (LCD). By using of the modem Electronic Design Automation (EDA) methods and new programmable logic devices FPGA, we construct the system circuitry architecture for further miniaturization or integration. Base on Xilinx Company's FPGA, the design was synthesized and simulated. The implementation was successfully test on a Xilinx XC3S400 for a 5.6-inch LCD.

Original language	English
Title of host publication	IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings
Pages	435-438
Number of pages	4
State	Published - 1 Dec 2007
Event	International Display Manufacturing Conference and Exhibition, IDMC 2007 - Taipei, Taiwan Duration: 3 Jul 2007 → 6 Jul 2007

Publication series

Name	IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings

Conference

Conference	International Display Manufacturing Conference and Exhibition, IDMC 2007
Country	Taiwan
City	Taipei
Period	3/07/07 → 6/07/07

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Hsu, Y. T., Lin, F. C., Chen, C. H., Huang, Y-P., & Shieh, H. P. D. (2007). Drive and control circuitry of OCB filed-sequential color LCD with high data rate. In IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings (pp. 435-438). (IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings).

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title = "Drive and control circuitry of OCB filed-sequential color LCD with high data rate",

abstract = "This paper provides a data controlling method for optically compensated bend (OCB) field sequential color (FSC) liquid crystal displays (LCD). By using of the modem Electronic Design Automation (EDA) methods and new programmable logic devices FPGA, we construct the system circuitry architecture for further miniaturization or integration. Base on Xilinx Company's FPGA, the design was synthesized and simulated. The implementation was successfully test on a Xilinx XC3S400 for a 5.6-inch LCD.",

author = "Hsu, {Ya Ting} and Lin, {Fang Cheng} and Chen, {Chun Ho} and Yi-Pai Huang and Shieh, {Han Ping D.}",

year = "2007",

month = dec,

day = "1",

language = "English",

isbn = "9789572852248",

series = "IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings",

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note = "null ; Conference date: 03-07-2007 Through 06-07-2007",

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Hsu, YT, Lin, FC, Chen, CH, Huang, Y-P & Shieh, HPD 2007, Drive and control circuitry of OCB filed-sequential color LCD with high data rate. in IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings. IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings, pp. 435-438, International Display Manufacturing Conference and Exhibition, IDMC 2007, Taipei, Taiwan, 3/07/07.

Drive and control circuitry of OCB filed-sequential color LCD with high data rate. / Hsu, Ya Ting; Lin, Fang Cheng; Chen, Chun Ho; Huang, Yi-Pai; Shieh, Han Ping D.

IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings. 2007. p. 435-438 (IDMC 2007 - International Display Manufacturing Conference and FPD Expo - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - This paper provides a data controlling method for optically compensated bend (OCB) field sequential color (FSC) liquid crystal displays (LCD). By using of the modem Electronic Design Automation (EDA) methods and new programmable logic devices FPGA, we construct the system circuitry architecture for further miniaturization or integration. Base on Xilinx Company's FPGA, the design was synthesized and simulated. The implementation was successfully test on a Xilinx XC3S400 for a 5.6-inch LCD.

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