Drain avalanche hot hole injection mode on PMOSFETs

F. Matsuoka*, H. Hayashida, K. Hama, Y. Toyoshima, H. Iwai, K. Maeguchi

*Corresponding author for this work

Research output: Contribution to journalConference article

11 Scopus citations

Abstract

Hot-carrier degradation was studied for surface-channel (p+ polysilicon-gate) PMOSFETs in comparison with buried-channel (n+ polysilicon-gate) PMOSFETs. In the shallow gate bias region, a carrier degradation mode by drain avalanche hot-hole injection was found for the surface-channel PMOSFETs. Here, trapped holes and interface state generation, which were not observed in the buried-channel PMOSFETs, were detected. In the deep-gate-bias region, a channel hot-hole interface-state-generation mode without the threshold voltage shift was found for both types of PMOSFETs studied.

Original languageEnglish
Pages (from-to)18-21
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
StatePublished - Dec 1988
EventTechnical Digest - International Electron Devices Meeting 1988 - San Francisco, CA, USA
Duration: 11 Dec 198814 Dec 1988

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