Hot-carrier degradation was studied for surface-channel (p+ polysilicon-gate) PMOSFETs in comparison with buried-channel (n+ polysilicon-gate) PMOSFETs. In the shallow gate bias region, a carrier degradation mode by drain avalanche hot-hole injection was found for the surface-channel PMOSFETs. Here, trapped holes and interface state generation, which were not observed in the buried-channel PMOSFETs, were detected. In the deep-gate-bias region, a channel hot-hole interface-state-generation mode without the threshold voltage shift was found for both types of PMOSFETs studied.
|Number of pages||4|
|Journal||Technical Digest - International Electron Devices Meeting|
|State||Published - Dec 1988|
|Event||Technical Digest - International Electron Devices Meeting 1988 - San Francisco, CA, USA|
Duration: 11 Dec 1988 → 14 Dec 1988