DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers

Zuow Zun Chen, Yen-Cheng Kuan, Yilei Li, Boyu Hu, Chien Heng Wong, Mau-Chung Chang

Research output: Contribution to journalArticle

4 Scopus citations

Abstract

In this paper, a low overhead phase noise cancellation technique for ring oscillator (RO)-based quadrature receivers is presented. The proposed technique operates in background and extracts RO phase noise as well as supply-induced phase noise from the digital phase-locked loop. The obtained phase noise information is then used to restore the randomly rotated baseband signal in digital domain. A receiver prototype is fabricated in standard 65-nm CMOS technology. It demonstrates a phase noise reduction from-88 to-109 dBc/Hz at 1-MHz offset and an integrated phase noise reduction from-16.8 to-34.6 dBc when operating at 2.4 GHz.

Original languageEnglish
Article number7862146
Pages (from-to)1134-1143
Number of pages10
JournalIEEE Journal of Solid-State Circuits
Volume52
Issue number4
DOIs
StatePublished - 1 Apr 2017

Keywords

  • Digital phase-locked loop (DPLL)
  • frequency synthesizer
  • phase noise cancellation
  • radio receiver
  • ring oscillator (RO)
  • sub-sampling time-To-digital converter (TDC)

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