Double noise coupling ΔΣ analogue-to-digital converter

Y. Jung*, S. Lee, Chia-Hung Chen, G. C. Temes

*Corresponding author for this work

Research output: Contribution to journalArticle

3 Scopus citations

Abstract

A novel ΔΣ analogue-to-digital (ADC) architecture is proposed for second-order noise shaping enhancement. The new architecture is less dependent on the opamp DC gain than the earlier ΔΣ ADC with second-order noise shaping enhancement. Also, the proposed architecture reduces the complexity of the clock generator and zero optimisation compared to the earlier one. A ΔΣ ADC using the new configuration was designed and simulated. The results verify the advantages of the proposed structure.

Original languageEnglish
Pages (from-to)557-558
Number of pages2
JournalElectronics Letters
Volume48
Issue number10
DOIs
StatePublished - 10 May 2012

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