Mura defect induced by chip-on-glass packaging in 13-inch LCD-TFT was investigated using contour measurement and numerical analysis. Excellent correlation between Mura defect and localized warpage/principal stress has been established. Besides, the effects of ACF bonding temperatures and Si chip arrangement on Mura defect were studied and discussed.
|Number of pages||4|
|Journal||Digest of Technical Papers - SID International Symposium|
|State||Published - 1 Jan 2009|
|Event||2009 Vehicles and Photons Symposium - Dearborn, MI, United States|
Duration: 15 Oct 2009 → 16 Oct 2009