Digitally programmable DC-DC voltage down converter

M. C. Lin, H. Y. Lin, C. L. Chen, Shyh-Jye Jou

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper describes a digitally programmable DC-DC voltage down converter (VDC) with a new structure of pulse width modulation (PWM) circuit. The PWM circuit is constructed by a cascaded digitally controlled oscillator (DCO) delay cells and provides two control words to select the operating frequency and duty cycle respectively. The VDC was implemented with a 0.6-μm triple-metal CMOS process on 1000×1000 μm 2 core size. The simulation results show that it can convert +5 V input voltage to +2∼+5 V output voltage in the 50 μs settling time.

Original languageEnglish
Title of host publicationAP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages367-370
Number of pages4
ISBN (Print)0780357051, 9780780357051
DOIs
StatePublished - 1 Jan 1999
Event1st IEEE Asia Pacific Conference on ASICs, AP-ASIC 1999 - Seoul, Korea, Republic of
Duration: 23 Aug 199925 Aug 1999

Publication series

NameAP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs

Conference

Conference1st IEEE Asia Pacific Conference on ASICs, AP-ASIC 1999
CountryKorea, Republic of
CitySeoul
Period23/08/9925/08/99

Fingerprint Dive into the research topics of 'Digitally programmable DC-DC voltage down converter'. Together they form a unique fingerprint.

  • Cite this

    Lin, M. C., Lin, H. Y., Chen, C. L., & Jou, S-J. (1999). Digitally programmable DC-DC voltage down converter. In AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs (pp. 367-370). [824109] (AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APASIC.1999.824109