Digital PLL for phase noise cancellation in ring oscillator-based I/Q receivers

Zuow Zun Chen, Yilei Li, Yen-Cheng Kuan, Boyu Hu, Chien Heng Wong, Mau-Chung Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

A digital phase noise cancellation technique for ring oscillator-based I/Q receivers is presented. Ring oscillator phase noise, including supply-induced phase noise, is extracted from digital phase-locked loop (DPLL) and used to restore the randomly rotated baseband signal in digital domain. The receiver prototype fabricated in 65nm CMOS technology achieves phase noise reduction from -88 to -109dBc/Hz at 1MHz offset, and an integrated phase noise (IPN) reduction from -16.8 to -34.6dBc, when operating at 2.4GHz.

Original languageEnglish
Title of host publication2016 IEEE Symposium on VLSI Circuits, VLSI Circuits 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509006342
DOIs
StatePublished - 21 Sep 2016
Event30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016 - Honolulu, United States
Duration: 14 Jun 201617 Jun 2016

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume2016-September

Conference

Conference30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016
CountryUnited States
CityHonolulu
Period14/06/1617/06/16

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