Digital Logic and Asynchronous Datapath with Heterogeneous TFET-MOSFET Structure for Ultralow-Energy Electronics

The tunnel field-effect transistor (TFET) is a promising solution for high energy-efficient circuits. Based on the band to band tunneling (BTBT) condition, fast switching characteristic with a steep subthreshold swing (S.S.) in the ultralow-voltage operation is feasible. However, the BTBT and the gate-to-drain lapping structure [1] result in a low on-state current and limits the TFET-based circuit applications. Our prior work has demonstrated that the S.S. and on-state current can be improved without leakage current penalty through the usage of SiGe low band gap material in epitaxial tunnel layer (ETL). ETL-TFET is highly compatible with the CMOS process, enabling heterogeneous integration of TFET and MOSFET in the same technology. In this work, the circuit performance of ETL-TFET and fully depleted SOI (FDSOI) MOSFET is evaluated and compared in terms of energy and delay metrics. By combining the advantages of TFET and MOSFET, heterogeneous PMOS-NTFET dynamic logic gates are proposed. The PMOS-NTFET based logic gates demonstrates the lowest energy consumption than other realizations. Asynchronous datapath is leveraged to combat the timing variations in the ultralow-voltage region. A 20.9% to 33.9% energy reduction is achieved compared to the conventional MOSFET counterpart.