Digital control of a multi-phase interleaved PWM inverter with minimal total harmonic distortion

Yu Tzung Lin*, Ying-Yu Tzou

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

15 Scopus citations

Abstract

This paper presents a digital repetitive control scheme for the minimization of output voltage total harmonic distortion (THD) of a PWM inverter under large unknown nonlinear load. The multi-phase interleaved PWM inverter has been adopted to enhance the effective switching frequency as well as to share the load current. The realization of a digital control for PWM inverter, such as sampling delay and quantization error, may introduce many nonlinear effects to distort its output waveforms. A systematic design procedure is developed to minimize selected range of harmonic spectrum by shaping the output impedance by so that its output voltage THD can be lower than a specified value with given design constraints. The proposed control scheme has been realized with fully digital design by using a single-chip FPGA implementation and verified by using co-simulation technique via a VHDL simulator Modelsim combined with a system-level block diagram oriented simulator Simulink.

Original languageEnglish
Title of host publicationPESC 07 - IEEE 38th Annual Power Electronics Specialists Conference
Pages503-509
Number of pages7
DOIs
StatePublished - 1 Dec 2007
EventPESC 07 - IEEE 38th Annual Power Electronics Specialists Conference - Orlando, FL, United States
Duration: 17 Jun 200721 Jun 2007

Publication series

NamePESC Record - IEEE Annual Power Electronics Specialists Conference
ISSN (Print)0275-9306

Conference

ConferencePESC 07 - IEEE 38th Annual Power Electronics Specialists Conference
CountryUnited States
CityOrlando, FL
Period17/06/0721/06/07

Keywords

  • Digital repetitive control
  • Minimal THD control
  • Modelsim and Simulink co-simulation
  • PWM inverter
  • Single-chip FPGA implementation

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