Differential low noise amplifier for s-band phased-array radar in 0.18-μm CMOS technology

Tzu Yu Hsia, Xin Yi Li, Liang Yu Ou Yang, Zuo-Min Tsai, Shih Yuan Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An S-band differential low noise amplifier (DLNA) is presented and implemented in TSMC 0.18-μm CMOS process for use in the receiver of a phased-array radar. A special layout approach is used in the input matching circuit by integrating two individual inductors together to shrink the chip area while increasing the inductances. The 3-dB gain bandwidth of the two-stage DLNA ranges from 1.9 to 4 GHz (72.41%). The measured gain is about 18.5 dB with an average in-band noise figure of 5.77 dB. The chip area is 0.4672 mm2.

Original languageEnglish
Title of host publicationProceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages786-788
Number of pages3
ISBN (Electronic)9781728135175
DOIs
StatePublished - Dec 2019
Event2019 IEEE Asia-Pacific Microwave Conference, APMC 2019 - Singapore, Singapore
Duration: 10 Dec 201913 Dec 2019

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC
Volume2019-December

Conference

Conference2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
CountrySingapore
CitySingapore
Period10/12/1913/12/19

Keywords

  • CMOS
  • Differential low noise amplifier (DLNA)
  • Phased-array radar

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    Hsia, T. Y., Li, X. Y., Yang, L. Y. O., Tsai, Z-M., & Chen, S. Y. (2019). Differential low noise amplifier for s-band phased-array radar in 0.18-μm CMOS technology. In Proceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019 (pp. 786-788). [9038409] (Asia-Pacific Microwave Conference Proceedings, APMC; Vol. 2019-December). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APMC46564.2019.9038409