Differential cascode voltage switch with the pass-gate (DCVSPG) logic tree for high performance CMOS digital systems

F. S. Lai, Wei Hwang

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review

Abstract

A new circuit configuration, the differential cascode volage switch with the pass-gate logic tree (DCVSPG), is presented. In this circuit family, we use the pass-gate logic tree to replace the nMOS logic tree in the conventionalDCVS circuit in order to eliminate the floating-node problem. By eliminating the floating, the DCVSPG shows superior performance, silicon area and power consumption. Moreover, the dynamic DCVSPG also provides the leverage of relieving the charge redistrbution concern and reinforces the signal integrity in the typical pre-charge dynamic circuits. The principfe of operation of the DCVSPG is explained. A simple synthesis technique of the pass-gate logic tree is discussed. Finally, a 64-bit carry look-ahead adder is designed by using the static DCVSPG circuit. A nominal cycle time (T0= 22°C and power supply of 2.5 V) of 2.0 ns is obtained by using a 0.5μm CMOS technology.

Original languageEnglish
Title of host publicationHigh-Performance System Design
Subtitle of host publicationCircuits and Logic
PublisherWiley-IEEE Press
Pages74-78
Number of pages5
ISBN (Electronic)9780470544846
ISBN (Print)0780347161, 9780780347168
DOIs
StatePublished - 1 Jan 1999

Keywords

  • Clocks
  • CMOS integrated circuits
  • Discharges
  • DSL
  • Switches
  • Switching circuits
  • Transistors

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