Device design considerations for ultra-thin body non-hysteretic negative capacitance FETs

Chun Wing Yeung, Asif I. Khan, Sayeef Salahuddin, Chen-Ming Hu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Scopus citations

Abstract

We present a simulation-based analysis of device design for ultra-thin body non-hysteretic Negative-Capacitance-FET (NCFET). Subthreshold swing dependencies on the relationship between the negative capacitance (from ferroelectric) and the positive capacitance (from the underlying MOSFET) are illustrated. To achieve less than 60mV/decade swing and hysteresis free operation, the negative capacitance needs to be smaller than the gate oxide capacitance, and be larger than the total underlying MOSFET capacitance within the operating voltage.

Original languageEnglish
Title of host publication2013 3rd Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2013 - Proceedings
DOIs
StatePublished - 1 Dec 2013
Event2013 3rd Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2013 - Berkeley, CA, United States
Duration: 28 Oct 201329 Oct 2013

Publication series

Name2013 3rd Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2013 - Proceedings

Conference

Conference2013 3rd Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2013
CountryUnited States
CityBerkeley, CA
Period28/10/1329/10/13

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    Yeung, C. W., Khan, A. I., Salahuddin, S., & Hu, C-M. (2013). Device design considerations for ultra-thin body non-hysteretic negative capacitance FETs. In 2013 3rd Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2013 - Proceedings [6705876] (2013 3rd Berkeley Symposium on Energy Efficient Electronic Systems, E3S 2013 - Proceedings). https://doi.org/10.1109/E3S.2013.6705876