The operating characteristics of MOS transistors constructed in substrates subject to MeV ion implantation have been studied. A standard CMOS process was modified to include high-energy implantation in order to produce a buried layer for device isolation. The process included various high energy implant energies and CMOS well depths. It was seen that device behavior of MOSFETs in the substrate were virtually unaffected by the MeV implantation; channel surface mobility, transconductance and threshold voltage were unchanged. Some variations in body effect parameter and output resistance were noted. Further studies of the CMOS well behavior indicated an increase in well/substrate leakage currents as MeV implanted buried-layer depths decreased.