Design Space Exploration Considering Back-Gate Biasing Effects for 2D Negative-Capacitance Field-Effect Transistors

Wei Xiang You*, Pin Su

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

29 Scopus citations

Abstract

With the aid of an analytical and scalable model, this paper explores the design space for negative-capacitance (NC) field-effect transistors (FETs) with a 2D semiconducting transition-metal-dichalcogenide channel. In addition, the impact of back-gate biasing on the design space and the body effect of 2D-NCFETs is also investigated. Our study indicates that, to mitigate the conflict between subthreshold swing and hysteresis and to maximize the design space for the 2D-NCFET, a thin buried oxide and an adequate reverse back-gate bias can be applied to achieve the optimum design.

Original languageEnglish
Article number7956271
Pages (from-to)3476-3481
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume64
Issue number8
DOIs
StatePublished - 1 Aug 2017

Keywords

  • 2D semiconductors
  • back-gate biasing
  • ferroelectric FET
  • Landau-Khalatnikov (L-K) equation
  • molybdenum disulphide (MoS2)
  • negative-capacitance field-effect transistor (NCFET)
  • transition-metal-dichalcogenide (TMD)

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