Design of on-chip power-rail ESD clamp circuit with ultra-small capacitance to detect ESD transition

Shih Hung Chen*, Ming-Dou Ker

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

A power-rail ESD clamp circuit with a new proposed ESD-transient detection circuit which adopts a ultra small capacitor to achieve the required functions has been presented and substantiated to own a long turn-on duration and high turn-on efficiency. In addition, the power-rail ESD clamp circuits with the new proposed ESD-transient detection circuit also presented an excellent immunity against the mis-trigger and the latch-on event under the fast power-on condition.

Original languageEnglish
Title of host publication2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
Pages327-330
Number of pages4
DOIs
StatePublished - 1 Dec 2009
Event2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09 - Hsinchu, Taiwan
Duration: 28 Apr 200930 Apr 2009

Publication series

Name2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09

Conference

Conference2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
CountryTaiwan
CityHsinchu
Period28/04/0930/04/09

Fingerprint Dive into the research topics of 'Design of on-chip power-rail ESD clamp circuit with ultra-small capacitance to detect ESD transition'. Together they form a unique fingerprint.

Cite this