Design of charge pump circuit in low-voltage CMOS process with suppressed return-back leakage current

Yi Hsin Weng*, Hui Wen Tsai, Ming-Dou Ker

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

10 Scopus citations

Abstract

A new charge pump circuit has been proposed to suppress the return-back leakage current without suffering the gate-oxide overstress problem in low-voltage CMOS process. A test chip has been implemented in a 65-nm CMOS process to verify the proposed charge pump circuit with four pumping stages. The measured output voltage is around 8.8 V with 1.8-V supply voltage, which is better than the conventional charge pump circuit with the same pumping stages. By reducing the return-back leakage current and without suffering gate-oxide reliability problem, the new proposed charge pump circuit is suitable for the applications in low-voltage CMOS IC products.

Original languageEnglish
Title of host publication2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010
Pages155-158
Number of pages4
DOIs
StatePublished - 20 Aug 2010
Event2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010 - Grenoble, France
Duration: 2 Jun 20104 Jun 2010

Publication series

Name2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010

Conference

Conference2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010
CountryFrance
CityGrenoble
Period2/06/104/06/10

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