Design of charge pump circuit in low-voltage CMOS process with suppressed return-back leakage current

Yi Hsin Weng; Hui Wen Tsai; Ming-Dou Ker

doi:10.1109/ICICDT.2010.5510271

Design of charge pump circuit in low-voltage CMOS process with suppressed return-back leakage current

Yi Hsin Weng^*, Hui Wen Tsai, Ming-Dou Ker

^*Corresponding author for this work

Department of Electronics Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

10 Scopus citations

Abstract

A new charge pump circuit has been proposed to suppress the return-back leakage current without suffering the gate-oxide overstress problem in low-voltage CMOS process. A test chip has been implemented in a 65-nm CMOS process to verify the proposed charge pump circuit with four pumping stages. The measured output voltage is around 8.8 V with 1.8-V supply voltage, which is better than the conventional charge pump circuit with the same pumping stages. By reducing the return-back leakage current and without suffering gate-oxide reliability problem, the new proposed charge pump circuit is suitable for the applications in low-voltage CMOS IC products.

Original language	English
Title of host publication	2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010
Pages	155-158
Number of pages	4
DOIs	https://doi.org/10.1109/ICICDT.2010.5510271
State	Published - 20 Aug 2010
Event	2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010 - Grenoble, France Duration: 2 Jun 2010 → 4 Jun 2010

Publication series

Name	2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010

Conference

Conference	2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010
Country	France
City	Grenoble
Period	2/06/10 → 4/06/10

Access to Document

10.1109/ICICDT.2010.5510271

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Weng, Y. H., Tsai, H. W., & Ker, M-D. (2010). Design of charge pump circuit in low-voltage CMOS process with suppressed return-back leakage current. In 2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010 (pp. 155-158). [5510271] (2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010). https://doi.org/10.1109/ICICDT.2010.5510271

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title = "Design of charge pump circuit in low-voltage CMOS process with suppressed return-back leakage current",

abstract = "A new charge pump circuit has been proposed to suppress the return-back leakage current without suffering the gate-oxide overstress problem in low-voltage CMOS process. A test chip has been implemented in a 65-nm CMOS process to verify the proposed charge pump circuit with four pumping stages. The measured output voltage is around 8.8 V with 1.8-V supply voltage, which is better than the conventional charge pump circuit with the same pumping stages. By reducing the return-back leakage current and without suffering gate-oxide reliability problem, the new proposed charge pump circuit is suitable for the applications in low-voltage CMOS IC products.",

author = "Weng, {Yi Hsin} and Tsai, {Hui Wen} and Ming-Dou Ker",

year = "2010",

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doi = "10.1109/ICICDT.2010.5510271",

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Weng, YH, Tsai, HW & Ker, M-D 2010, Design of charge pump circuit in low-voltage CMOS process with suppressed return-back leakage current. in 2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010., 5510271, 2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010, pp. 155-158, 2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010, Grenoble, France, 2/06/10. https://doi.org/10.1109/ICICDT.2010.5510271

Design of charge pump circuit in low-voltage CMOS process with suppressed return-back leakage current. / Weng, Yi Hsin; Tsai, Hui Wen; Ker, Ming-Dou.

2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010. 2010. p. 155-158 5510271 (2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Y1 - 2010/8/20

N2 - A new charge pump circuit has been proposed to suppress the return-back leakage current without suffering the gate-oxide overstress problem in low-voltage CMOS process. A test chip has been implemented in a 65-nm CMOS process to verify the proposed charge pump circuit with four pumping stages. The measured output voltage is around 8.8 V with 1.8-V supply voltage, which is better than the conventional charge pump circuit with the same pumping stages. By reducing the return-back leakage current and without suffering gate-oxide reliability problem, the new proposed charge pump circuit is suitable for the applications in low-voltage CMOS IC products.

AB - A new charge pump circuit has been proposed to suppress the return-back leakage current without suffering the gate-oxide overstress problem in low-voltage CMOS process. A test chip has been implemented in a 65-nm CMOS process to verify the proposed charge pump circuit with four pumping stages. The measured output voltage is around 8.8 V with 1.8-V supply voltage, which is better than the conventional charge pump circuit with the same pumping stages. By reducing the return-back leakage current and without suffering gate-oxide reliability problem, the new proposed charge pump circuit is suitable for the applications in low-voltage CMOS IC products.

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Weng YH, Tsai HW, Ker M-D. Design of charge pump circuit in low-voltage CMOS process with suppressed return-back leakage current. In 2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010. 2010. p. 155-158. 5510271. (2010 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2010). https://doi.org/10.1109/ICICDT.2010.5510271