Design of an all-digital LVDS driver

Hungwen Lu*, Hsin Wen Wang, Chau-Chin Su, Chien-Nan Liu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

11 Scopus citations

Abstract

This paper presents an all-digital low-voltage-differential-signaling (LVDS) driver design for Serial Advanced Technology Attachment II. A simultaneous-switching-noise reduction technique and an autocalibration mechanism are implemented to suppress switching noise and to handle process and environmental variations. The circuit is implemented in a 0.18-μm 1P6M CMOS process with a core area of 0.072 mm2. At 3 Gbps, it consumes 9 mW of power under a 1.8-V power supply or 3 pJ/ bit.

Original languageEnglish
Pages (from-to)1635-1644
Number of pages10
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume56
Issue number8
DOIs
StatePublished - 4 Sep 2009

Keywords

  • Low-voltage-differential-signaling (LVDS) driver
  • Simultaneous switching noise (SSN)

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