Design of 2.5V/5V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit

Ming-Dou Ker*, Chia Sheng Tsai

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

25 Scopus citations

Abstract

This paper presents a 2.5V/5V mixed-voltage CMOS I/O buffer that does not need a CMOS technology with a dual-oxide option and complex bias circuits. The proposed mixed-voltage I/O buffer with simpler circuit structure can overcome the problems of leakage current and gate-oxide reliability, which occurring in the conventional CMOS I/O buffer. In this work, the new proposed design has been realized in a 0.25-μm CMOS process, but it can be easily scaled toward 0.18-μm or 0.15-μm processes to serve a 1.8V/3.3V mixed-voltage I/O interface.

Original languageEnglish
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume5
DOIs
StatePublished - 14 Jul 2003
EventProceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand
Duration: 25 May 200328 May 2003

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