Design and implementation of a reconfigurable architecture for (528, 518) Reed-Solomon codec IP

Fuh Ke Chang; Wei Chun Hsu; Chien Ching Lin; Hsie-Chia Chang

doi:10.1109/NEWCAS.2005.1496742

Design and implementation of a reconfigurable architecture for (528, 518) Reed-Solomon codec IP

Fuh Ke Chang^*, Wei Chun Hsu, Chien Ching Lin, Hsie-Chia Chang

^*Corresponding author for this work

Department of Electronics Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

In this paper, an area-efficient Reed-Solomon (RS) codec IP with composite-field inverter is presented. For some specific applications such as flash memory controller using RS (528,518) code over GF(2¹⁰) to correct 4 errors, the RS decoder will stop receiving any new codeword until the on-going erroneous codeword to be corrected. It is that the circuit complexity can be reduced by sharing the registers and finite-field operation units. Moreover, the proposed hardware sharing architecture also includes the RS encoder. After implementing by 0.18μm 1P6M standard cell slow library, the RS (528, 518) codec IP totally requires 2 finite-field multiplier, 1 composite-field inverter and 17(=4t+l) registers, where t is the number of correctable errors. In contrast with other architectures, at least 42% circuit complexity can be reduced in our proposal.

Original language	English
Title of host publication	3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005
Pages	87-90
Number of pages	4
DOIs	https://doi.org/10.1109/NEWCAS.2005.1496742
State	Published - 1 Dec 2005
Event	3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005 - Quebec City, QC, Canada Duration: 19 Jun 2005 → 22 Jun 2005

Publication series

Name	3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005
Volume	2005

Conference

Conference	3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005
Country	Canada
City	Quebec City, QC
Period	19/06/05 → 22/06/05

Access to Document

10.1109/NEWCAS.2005.1496742

Link to publication in Scopus

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Chang, F. K., Hsu, W. C., Lin, C. C., & Chang, H-C. (2005). Design and implementation of a reconfigurable architecture for (528, 518) Reed-Solomon codec IP. In 3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005 (pp. 87-90). [1496742] (3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005; Vol. 2005). https://doi.org/10.1109/NEWCAS.2005.1496742

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abstract = "In this paper, an area-efficient Reed-Solomon (RS) codec IP with composite-field inverter is presented. For some specific applications such as flash memory controller using RS (528,518) code over GF(210) to correct 4 errors, the RS decoder will stop receiving any new codeword until the on-going erroneous codeword to be corrected. It is that the circuit complexity can be reduced by sharing the registers and finite-field operation units. Moreover, the proposed hardware sharing architecture also includes the RS encoder. After implementing by 0.18μm 1P6M standard cell slow library, the RS (528, 518) codec IP totally requires 2 finite-field multiplier, 1 composite-field inverter and 17(=4t+l) registers, where t is the number of correctable errors. In contrast with other architectures, at least 42% circuit complexity can be reduced in our proposal.",

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Chang, FK, Hsu, WC, Lin, CC & Chang, H-C 2005, Design and implementation of a reconfigurable architecture for (528, 518) Reed-Solomon codec IP. in 3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005., 1496742, 3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005, vol. 2005, pp. 87-90, 3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005, Quebec City, QC, Canada, 19/06/05. https://doi.org/10.1109/NEWCAS.2005.1496742

Design and implementation of a reconfigurable architecture for (528, 518) Reed-Solomon codec IP. / Chang, Fuh Ke; Hsu, Wei Chun; Lin, Chien Ching; Chang, Hsie-Chia.

3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005. 2005. p. 87-90 1496742 (3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005; Vol. 2005).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Chang FK, Hsu WC, Lin CC, Chang H-C. Design and implementation of a reconfigurable architecture for (528, 518) Reed-Solomon codec IP. In 3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005. 2005. p. 87-90. 1496742. (3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005). https://doi.org/10.1109/NEWCAS.2005.1496742