Design and implementation of a Packet-in buffer system for SDN switches

Shie-Yuan Wang, Chun Hao Chang, Yi Hsuan Hsieh, Chih Liang Chou

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

In this paper, we designed, implemented, and evaluated the performance of a Packet-in packet buffer system in an SDN bare metal commodity switch and Open vSwitch. In our approach, only the first packet of a new flow needs to be sent to the SDN controller via a Packet-in packet and all subsequent packets can be temporarily stored in the Packet-in packet buffer system until the arrival of the flow rule. Our experimental results show that our approach effectively prevents packets of a new flow from being dropped when they pass an SDN switch, significantly reduces the switch CPU usage, greatly reduces the control plane bandwidth usage, and greatly reduces the Packet-in packet processing load imposed on the SDN controller.

Original languageEnglish
Title of host publication2017 IEEE Symposium on Computers and Communications, ISCC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages955-960
Number of pages6
ISBN (Electronic)9781538616291
DOIs
StatePublished - 1 Sep 2017
Event2017 IEEE Symposium on Computers and Communications, ISCC 2017 - Heraklion, Greece
Duration: 3 Jul 20177 Jul 2017

Publication series

NameProceedings - IEEE Symposium on Computers and Communications
ISSN (Print)1530-1346

Conference

Conference2017 IEEE Symposium on Computers and Communications, ISCC 2017
CountryGreece
CityHeraklion
Period3/07/177/07/17

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