Design and implementation of a fault tolerant ATM switch

Kuo-Chen Wang, Feng Ming Lin

Research output: Contribution to journalArticle

1 Scopus citations

Abstract

In this paper, we propose a new method to build a fault tolerant ATM switch. Using this method, we can build an ATM switch which has two disjoint paths between each input/ output pair. The key component in the proposed switch is a 2 × 2 FTSE (Fault Tolerant Switching Element), which can be used as the basic building block for high speed ATM switches. The design of the FTSE-based fault tolerant ATM switch is based on a multi-path, self-routing principle. In terms of modularity, the proposed FTSE is suitable for building any multistage interconnection network (MINs). Thus, we can construct an MIN which has two levels of fault tolerance ability, and in which the redundant paths are in proportion to the network size. From the results of mathematical analysis, we conclude that our ATM switch uses fewer switching elements and has more redundant paths than other comparable ATM switches. The ATM switch is described using VHDL. By means of VHDL simulation, we verify the functionality of the switch. We have also synthesized the ATM switch to evaluate its delay and area. The experimental results demonstrate that the reliability/cost ratio of the fault tolerant FTSE-based ATM switch is better than those of other comparable switches.

Original languageEnglish
Pages (from-to)521-541
Number of pages21
JournalJournal of Information Science and Engineering
Volume15
Issue number4
DOIs
StatePublished - 1 Jul 1999

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