Design and implementation of 18-band Quasi-ANSI S1.11 1/3-octave filter bank for digital hearing aids

Ching Hao Lin*, Kuo Chiang Chang, Ming Hsun Chuang, Chih-Wei Liu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

The ANSI S1.11 1/3-octave filter bank is popular in many acoustic applications because it matches the human hearing characteristics. However, the long group delay and the high computational complexity limit the usage in hearing aids. A Quasi-ANSI S1.11 18-band 1/3-octave filter bank is proposed to reduce the group delay. With the matching error reduction method, the results show that the filter bank achieve comparable good matching between prescriptions and hearing aid response. The overall group delay is significantly reduced to 10ms compared to 78ms in the ANSI 1/3-octave filter bank design. Finally, the IFIR technique is adopted to minimize the computational complexity. For an 18-band digital hearing aid with 24 KHz sampling rate, the proposed architecture saves about 93% of multiplications and up to 74% of storage elements, comparing that with a parallel FIRs architecture. The test chip has been implemented in UMC 90 nm high-Vt CMOS technology, which consumes only 73 W. By voltage scaling, the circuit-level simulation result exhibits that the power consumption of the test chip reduces to 27 W, which is about 30% of that of the most energy-efficient design for digital hearing aids available in the literature.

Original languageEnglish
Title of host publication2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers
DOIs
StatePublished - 25 Jul 2012
Event2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Hsinchu, Taiwan
Duration: 23 Apr 201225 Apr 2012

Publication series

Name2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers

Conference

Conference2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012
CountryTaiwan
CityHsinchu
Period23/04/1225/04/12

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