Design and Fabrication of Self-Organized Ge Gate/SiO2/Si1-xGex-nanoshell with Raised Source/Drain for Advanced Transistors

I. Hsiang Wang, Keng Ping Peng, Horng Chih Lin, Pei Wen Li

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

We report a novel self-organized approach for the fabrication of Ge-nanospherical (NP) gate/SiO2/Si1-xGex-recess channel heterostructures with raised source/drain using a single oxidation step. By controlling the width of Si recess-trench, we are able to tune the size of Ge NPs which essentially determines the spherical-gate channel length. Our proposed approach and gate-stacking heterostructure of Ge-NP/SiO2/Si1-xGex-recess channel provides an effective building block for the fabrication of advanced Ge-based MOS and quantum transistors.

Original languageEnglish
Title of host publication4th Electron Devices Technology and Manufacturing Conference, EDTM 2020 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728125381
DOIs
StatePublished - Apr 2020
Event4th Electron Devices Technology and Manufacturing Conference, EDTM 2020 - Penang, Malaysia
Duration: 6 Apr 202021 Apr 2020

Publication series

Name4th Electron Devices Technology and Manufacturing Conference, EDTM 2020 - Proceedings

Conference

Conference4th Electron Devices Technology and Manufacturing Conference, EDTM 2020
CountryMalaysia
CityPenang
Period6/04/2021/04/20

Keywords

  • channel engineering
  • germanium nanosphere
  • MOS
  • Self-organization
  • Si trench
  • SiGe

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