Demonstration of 3D vertical RRAM with ultra low-leakage, high-selectivity and self-compliance memory cells

Qing Luo, Xiaoxin Xu, Hongtao Liu, Hangbing Lv, Tiancheng Gong, Shibing Long, Qi Liu, Haitao Sun, Writam Banerjee, Ling Li, Jianfeng Gao, Nianduan Lu, Steve S. Chung, Jing Li, Ming Liu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

38 Scopus citations

Abstract

Developing high performance self-selective cell (SSC) is one of the most critical issues of the integration of 3D vertical RRAM (V-RRAM). In this work, a four-layer V-RRAM array, with high performance HfO2/mixed ionic and and electronic conductor (MIEC) bilayer SSC, was demonstrated for the first time. Several salient features were achieved, including ultra-low half-select leakage (<0.1 pA), very high nonlinearity (>103), low operation current (nA level), self-compliance, high endurance (>107), and robust read/write disturbance immunity.

Original languageEnglish
Title of host publication2015 IEEE International Electron Devices Meeting, IEDM 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages10.2.1-10.2.4
ISBN (Electronic)9781467398930
DOIs
StatePublished - 16 Feb 2015
Event61st IEEE International Electron Devices Meeting, IEDM 2015 - Washington, United States
Duration: 7 Dec 20159 Dec 2015

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
Volume2016-February
ISSN (Print)0163-1918

Conference

Conference61st IEEE International Electron Devices Meeting, IEDM 2015
CountryUnited States
CityWashington
Period7/12/159/12/15

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