Deep-trap stress induced leakage current model for nominal and weak oxides

Shiro Kamohara*, Chen-Ming Hu, Tsugunori Okumura

*Corresponding author for this work

Research output: Contribution to journalArticle

1 Scopus citations

Abstract

We have developed a model of the stress-induced leakage current (SILC) based on the inelastic trap-assisted tunneling (ITAT) by introducing a trap with a deep energy level of 3.6 eV from the bottom of the conduction band. This model can explain both of two field dependencies, i.e., a field dependence of the direct tunneling (DT) for A-mode SILC and that of the Fowler-Nordheim (FN) tunneling for B-mode SILC by analytical equations of a common form. For simple analytical equations, we introduce the most favorable trap position (MFTP), which gives the largest contribution to the leakage current. The trap area density for A-mode SILC of around 1 × 1010 cm-2 and the area density of the leakage paths for B-mode SILC of 1 × 10 2cm-2 were obtained by comparisons between the experimental results and the present model.

Original languageEnglish
Pages (from-to)6208-6213
Number of pages6
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume47
Issue number8 PART 1
DOIs
StatePublished - 8 Aug 2008

Keywords

  • Flash memory
  • LSI
  • Leakage current
  • Oxide
  • Stress
  • Trap

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