Deep sub-micron strained Si0.85Ge0.15 channel p-channel Metal-Oxide-Semiconductor Field-Effect Transistors (pMOSFETs) with ultra-thin N2O-annealed SiN gate dielectric

Ching Wei Chen*, Chao-Hsin Chien, Yi Cheng Chen, Shih Lu Hsu, Chun Yen Chang

*Corresponding author for this work

Research output: Contribution to journalArticle

1 Scopus citations

Abstract

We have investigated the electrical characteristics of strained Si 0.85Ge0.15 channel p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) with ultra-thin N2O-annealed SiN gate dielectric. We have found that the thickness of SiGe channel has a great impact on the device characteristics. With controlling the SiGe layer thickness thinner than 15 nm, the device depict a subthreshold swing of 68mV/A, the interface state density of 1 × 1011 eV -1·cm-2, acceptable junction leakage, and more than 50% hole mobility improvement with respect to the Si channel device. Therefore, high quality interface between the gate dielectric and the strained SiGe channel can be achieved by using the N2O-annealed SiN gate dielectric.

Original languageEnglish
JournalJapanese Journal of Applied Physics, Part 2: Letters
Volume44
Issue number8-11
DOIs
StatePublished - 13 Jun 2005

Keywords

  • Dislocation
  • NO-annealed
  • SiGe channel
  • SiN gate dielectric

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