Crystallinity Effect on Reliability of Sidewall Damascened Nanowire Poly-Si GAA FETs

Chuan Hui Shen, Wei Yen Chen, Chun Chih Chung, Yu En Huang, Tien Sheng Chao*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Poly-Si GAA FETs using sidewall damascened method are successfully demonstrated. By manipulating the stress imposed by nitride layer, crystallinity of poly-Si can be modified by changing the thickness of top nitride. Devices with larger grain size and fewer defects lead to superior electrical characteristics. Hot carrier and gate stress reliability of devices were then investigated. With better crystallinity, electrical characteristics degrade less under hot carrier stress due to less electric field enhancement. On the contrary, degradation of gate stress reliability is less sensitive to different crystallinity level. This is owing to the smaller activation energy of hot carrier effect making it more sensitive to crystallinity. With better crystallinity, poly-Si GAA nanowire FETs possess not only better electrical characteristics but also degrade less under stressing.

Original languageEnglish
Title of host publication2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages53-54
Number of pages2
ISBN (Electronic)9781728197357
DOIs
StatePublished - Jun 2020
Event2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020 - Honolulu, United States
Duration: 13 Jun 202014 Jun 2020

Publication series

Name2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020

Conference

Conference2020 IEEE Silicon Nanoelectronics Workshop, SNW 2020
CountryUnited States
CityHonolulu
Period13/06/2014/06/20

Keywords

  • Crystallinity
  • GAA
  • nanowire
  • poly-Si
  • reliability

Fingerprint Dive into the research topics of 'Crystallinity Effect on Reliability of Sidewall Damascened Nanowire Poly-Si GAA FETs'. Together they form a unique fingerprint.

Cite this