Cross layer design to multi-thread a data-pipelining application on a multi-processor on chip

Bo-Cheng Lai*, Patrick Schaumont, Wei Qin, Ingrid Verbauwhede

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor platform spans multiple design layers, including the application layer, the system software layer, the architecture layer and the micro-architecture layer. For best results, designers have to consider multiple design layers (vertical exploration) and multiple architecture options (horizontal exploration). By using a data-pipelining JPEG encoder as the application driver, this paper presents a comprehensive analysis of mapping a data-pipelined application through multiple design layers, to a shared-memory SMP (Symmetric Multi-Processing) system. It is shown that a single-layered optimization ends up with a 110% worse design if the system effects from other layers are not taken into account. Compared to the nominal case, with appropriate mapping of the application, we achieve 47.5% improvement for high performance design and 77.6% energy reduction for energy efficient design under constant performance.

Original languageEnglish
Title of host publicationProceedings - IEEE 17th International Conference on Application-specific Systems, Architectures and Processors, ASAP 2006
Pages15-18
Number of pages4
DOIs
StatePublished - 1 Dec 2006
EventIEEE 17th International Conference on Application-specific Systems, Architectures and Processors, ASAP 2006 - Steamboat Springs, CO, United States
Duration: 11 Sep 200613 Sep 2006

Publication series

NameProceedings of the International Conference on Application-Specific Systems, Architectures and Processors
ISSN (Print)1063-6862

Conference

ConferenceIEEE 17th International Conference on Application-specific Systems, Architectures and Processors, ASAP 2006
CountryUnited States
CitySteamboat Springs, CO
Period11/09/0613/09/06

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