Correlating drain-current with strain-induced mobility in nanoscale strained CMOSFETs

Hong Nien Lin*, Hung Wei Chen, Chih Hsin Ko, Chung Hu Ge, Horng-Chih Lin, Tiao Yuan Huang, Wen Chin Lee

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

24 Scopus citations


The correlation between channel mobility gain (Δμ), linear drain-current gain (ΔIdlin), and saturation drain-current gain (ΔIdsat) of nanoscale strained CMOSFETs are reported. From the plots of ΔIdlin versus ΔIdsat and ballistic efficiency (Bsat,PSS), the ratio of source/drain parasitic resistance (RSD,PSS) to channel resistance (RCH,PSS) of strained CMOSFETs can be extracted. By plotting Δμ versus ΔIdlin, the efficiency of Δμ translated to ΔIdlin is higher for strained pMOSFETs than strained nMOSFETs due to smaller RSD,PSS-to-RCH,PSS ratio of strained pMOSFETs. It suggests that to exploit strain benefits fully, the RSD,PSS reduction for strained nMOSFETs is vital, while for strained pMOSFETs the ΔIdlin-to-Δμ sensitivity is maintained until RSD,PSS becomes comparable to/or higher than RCH,PSS.

Original languageEnglish
Pages (from-to)659-661
Number of pages3
JournalIEEE Electron Device Letters
Issue number8
StatePublished - 1 Aug 2006


  • Current
  • Mobility
  • Strain

Fingerprint Dive into the research topics of 'Correlating drain-current with strain-induced mobility in nanoscale strained CMOSFETs'. Together they form a unique fingerprint.

Cite this